Linux 7.2 Enables UltraRISC RISC-V Support in Default Kernel Build
UltraRISC support has been integrated into Linux 7.2's RISC-V defconfig, targeting the UR-DP1000 SoC (8-core C100), expanding the ecosystem.
According to a report by Michael Larabel of Phoronix, support for UltraRISC RISC-V SoCs (System-on-Chip) has been added to the default kernel build configuration (defconfig) in the Linux 7.2 kernel. This update is part of a series of RISC-V fixes merged just before the weekly test release of Linux 7.2-rc3.
The kernel already had default support for Eswin SoCs in the RISC-V defconfig, but this latest patch also includes support for UltraRISC hardware in the standard build. This means the default kernel for the RISC-V architecture will now be compatible with a broader range of hardware.
Integration into the Default Kernel Build
The patch merged into Linux 7.2 introduces a Kconfig option named ARCH_ULTRARISC. Although this addition came relatively late, after the merge window (the period when new features are accepted) had closed, it was already referenced by some drivers. According to Phoronix, the patch was integrated into the Linux Git repository shortly before the release.
In Linux 7.2, the RISC-V default build configuration (defconfig) now enables CONFIG_ARCH_ULTRARISC. This means users no longer need special kernel settings to compile a kernel that works on boards equipped with UltraRISC SoCs. This marks a significant step toward standardizing hardware support within the RISC-V ecosystem.
Similarly, Eswin SoC support had already been enabled by default in Linux 7.2. Eswin, a Chinese semiconductor company, develops RISC-V-based SoCs. With the inclusion of UltraRISC support, the range of RISC-V SoC vendors supported in the defconfig has further expanded.
Details of UltraRISC UR-DP1000
The SoC currently offered by UltraRISC is the “UR-DP1000,” which features eight “UltraRISC C100” cores. While the detailed microarchitecture of the C100 core has not been disclosed, it is a processor core compliant with the RISC-V instruction set.
The UR-DP1000 is designed primarily for embedded systems and edge computing applications. With default kernel support, the development efficiency of products using this SoC is expected to improve. Developers will be able to utilize the standard RISC-V defconfig directly without needing to add custom kernel settings.
Impact on the RISC-V Ecosystem
Linux 7.2 also introduces enhancements to Cache Aware Scheduling (CAS) for RISC-V architecture. As detailed in the previously reported Linux Cache Aware Scheduling Enhancements Boost MySQL Performance by Up to 360%, this feature enables task scheduling that considers cache topology, significantly improving performance in tasks like database processing. The ability of UltraRISC SoCs to operate with Linux’s default kernel and these scheduling optimizations creates a mutually complementary relationship.
Additionally, Linux 7.2-rc1 has integrated various features like AMDGPU HDMI 2.1 FRL and Cache Aware Scheduling. Whether RISC-V devices can benefit from these latest features depends on vendor driver support. However, the expanded kernel build settings lower the barrier for community testing and validation.
The inclusion of emerging RISC-V vendors like UltraRISC in the mainline kernel’s default build is a key indicator of the ecosystem’s maturity. Historically, Linux kernels for RISC-V often required custom builds for specific boards. However, with richer defconfig options, there is a growing foundation for more universal builds.
Editorial Opinion
In the short term, this change will make it easier to boot standard Linux distributions on boards equipped with UltraRISC’s UR-DP1000. Developers can focus on evaluating software stacks without worrying about kernel configuration. Once the stable release of Linux 7.2 is available, the possibility of generic kernel images for RISC-V could accelerate its adoption in cloud and edge applications.
From a long-term perspective, the continuous addition of vendors to the RISC-V defconfig will further promote the architecture as a general-purpose computing platform. Just as ARM has established a foothold in the server market, RISC-V could also gain traction by building a robust, standard kernel-based platform, thereby enriching its software ecosystem. However, widespread adoption in desktops and servers will require advancements in high-performance cores and a more extensive range of peripheral drivers, which remains a significant challenge.
As an editorial team, we note the growing inclusion of mid-tier vendors like UltraRISC into the mainline kernel as a positive trend.
References
- “Linux 7.2 Enabling UltraRISC RISC-V Support In The Default Kernel Build”, by Michael Larabel — Phoronix, 2026-07-12T20:25:10.000Z (ARR)
- Source URL: https://www.phoronix.com/news/Linux-7.2-UltraRISC-RISC-V
Frequently Asked Questions
- What are the intended use cases for the UltraRISC UR-DP1000?
- The UR-DP1000 is an 8-core RISC-V SoC primarily designed for embedded systems and edge computing. With default kernel support, it is expected to facilitate the adoption of Linux on evaluation boards and industrial control devices.
- Which other vendors are included in Linux 7.2's RISC-V defconfig?
- Before this change, Eswin's SoC support was already enabled by default. These additions expand the range of RISC-V boards that are compatible with the standard build.
- How will this change impact general users?
- General users who purchase RISC-V devices will likely find that standard Linux distributions work out of the box without requiring custom kernel builds. This reduces evaluation costs for developers and improves compatibility for end users.
Comments